root/lj_emit_mips.h

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INCLUDED FROM


DEFINITIONS

This source file includes following definitions.
  1. get_k64val
  2. emit_dst
  3. emit_dta
  4. emit_tsi
  5. emit_fgh
  6. emit_rotr
  7. emit_tsml
  8. emit_kdelta1
  9. emit_loadi
  10. emit_loadu64
  11. emit_lsptr
  12. emit_loadk64
  13. emit_lsglptr
  14. emit_branch
  15. emit_jmp
  16. emit_call
  17. emit_movrr
  18. emit_loadofs
  19. emit_storeofs
  20. emit_addptr

   1 /*
   2 ** MIPS instruction emitter.
   3 ** Copyright (C) 2005-2017 Mike Pall. See Copyright Notice in luajit.h
   4 */
   5 
   6 #if LJ_64
   7 static intptr_t get_k64val(IRIns *ir)
   8 {
   9   if (ir->o == IR_KINT64) {
  10     return (intptr_t)ir_kint64(ir)->u64;
  11   } else if (ir->o == IR_KGC) {
  12     return (intptr_t)ir_kgc(ir);
  13   } else if (ir->o == IR_KPTR || ir->o == IR_KKPTR) {
  14     return (intptr_t)ir_kptr(ir);
  15   } else if (LJ_SOFTFP && ir->o == IR_KNUM) {
  16     return (intptr_t)ir_knum(ir)->u64;
  17   } else {
  18     lua_assert(ir->o == IR_KINT || ir->o == IR_KNULL);
  19     return ir->i;  /* Sign-extended. */
  20   }
  21 }
  22 #endif
  23 
  24 #if LJ_64
  25 #define get_kval(ir)            get_k64val(ir)
  26 #else
  27 #define get_kval(ir)            ((ir)->i)
  28 #endif
  29 
  30 /* -- Emit basic instructions --------------------------------------------- */
  31 
  32 static void emit_dst(ASMState *as, MIPSIns mi, Reg rd, Reg rs, Reg rt)
  33 {
  34   *--as->mcp = mi | MIPSF_D(rd) | MIPSF_S(rs) | MIPSF_T(rt);
  35 }
  36 
  37 static void emit_dta(ASMState *as, MIPSIns mi, Reg rd, Reg rt, uint32_t a)
  38 {
  39   *--as->mcp = mi | MIPSF_D(rd) | MIPSF_T(rt) | MIPSF_A(a);
  40 }
  41 
  42 #define emit_ds(as, mi, rd, rs)         emit_dst(as, (mi), (rd), (rs), 0)
  43 #define emit_tg(as, mi, rt, rg)         emit_dst(as, (mi), (rg)&31, 0, (rt))
  44 
  45 static void emit_tsi(ASMState *as, MIPSIns mi, Reg rt, Reg rs, int32_t i)
  46 {
  47   *--as->mcp = mi | MIPSF_T(rt) | MIPSF_S(rs) | (i & 0xffff);
  48 }
  49 
  50 #define emit_ti(as, mi, rt, i)          emit_tsi(as, (mi), (rt), 0, (i))
  51 #define emit_hsi(as, mi, rh, rs, i)     emit_tsi(as, (mi), (rh) & 31, (rs), (i))
  52 
  53 static void emit_fgh(ASMState *as, MIPSIns mi, Reg rf, Reg rg, Reg rh)
  54 {
  55   *--as->mcp = mi | MIPSF_F(rf&31) | MIPSF_G(rg&31) | MIPSF_H(rh&31);
  56 }
  57 
  58 #define emit_fg(as, mi, rf, rg)         emit_fgh(as, (mi), (rf), (rg), 0)
  59 
  60 static void emit_rotr(ASMState *as, Reg dest, Reg src, Reg tmp, uint32_t shift)
  61 {
  62   if (LJ_64 || (as->flags & JIT_F_MIPSXXR2)) {
  63     emit_dta(as, MIPSI_ROTR, dest, src, shift);
  64   } else {
  65     emit_dst(as, MIPSI_OR, dest, dest, tmp);
  66     emit_dta(as, MIPSI_SLL, dest, src, (-shift)&31);
  67     emit_dta(as, MIPSI_SRL, tmp, src, shift);
  68   }
  69 }
  70 
  71 #if LJ_64
  72 static void emit_tsml(ASMState *as, MIPSIns mi, Reg rt, Reg rs, uint32_t msb,
  73                       uint32_t lsb)
  74 {
  75   *--as->mcp = mi | MIPSF_T(rt) | MIPSF_S(rs) | MIPSF_M(msb) | MIPSF_L(lsb);
  76 }
  77 #endif
  78 
  79 /* -- Emit loads/stores --------------------------------------------------- */
  80 
  81 /* Prefer rematerialization of BASE/L from global_State over spills. */
  82 #define emit_canremat(ref)      ((ref) <= REF_BASE)
  83 
  84 /* Try to find a one step delta relative to another constant. */
  85 static int emit_kdelta1(ASMState *as, Reg t, intptr_t i)
  86 {
  87   RegSet work = ~as->freeset & RSET_GPR;
  88   while (work) {
  89     Reg r = rset_picktop(work);
  90     IRRef ref = regcost_ref(as->cost[r]);
  91     lua_assert(r != t);
  92     if (ref < ASMREF_L) {
  93       intptr_t delta = (intptr_t)((uintptr_t)i -
  94         (uintptr_t)(ra_iskref(ref) ? ra_krefk(as, ref) : get_kval(IR(ref))));
  95       if (checki16(delta)) {
  96         emit_tsi(as, MIPSI_AADDIU, t, r, delta);
  97         return 1;
  98       }
  99     }
 100     rset_clear(work, r);
 101   }
 102   return 0;  /* Failed. */
 103 }
 104 
 105 /* Load a 32 bit constant into a GPR. */
 106 static void emit_loadi(ASMState *as, Reg r, int32_t i)
 107 {
 108   if (checki16(i)) {
 109     emit_ti(as, MIPSI_LI, r, i);
 110   } else {
 111     if ((i & 0xffff)) {
 112       intptr_t jgl = (intptr_t)(void *)J2G(as->J);
 113       if ((uintptr_t)(i-jgl) < 65536) {
 114         emit_tsi(as, MIPSI_ADDIU, r, RID_JGL, i-jgl-32768);
 115         return;
 116       } else if (emit_kdelta1(as, r, i)) {
 117         return;
 118       } else if ((i >> 16) == 0) {
 119         emit_tsi(as, MIPSI_ORI, r, RID_ZERO, i);
 120         return;
 121       }
 122       emit_tsi(as, MIPSI_ORI, r, r, i);
 123     }
 124     emit_ti(as, MIPSI_LUI, r, (i >> 16));
 125   }
 126 }
 127 
 128 #if LJ_64
 129 /* Load a 64 bit constant into a GPR. */
 130 static void emit_loadu64(ASMState *as, Reg r, uint64_t u64)
 131 {
 132   if (checki32((int64_t)u64)) {
 133     emit_loadi(as, r, (int32_t)u64);
 134   } else {
 135     uint64_t delta = u64 - (uint64_t)(void *)J2G(as->J);
 136     if (delta < 65536) {
 137       emit_tsi(as, MIPSI_DADDIU, r, RID_JGL, (int32_t)(delta-32768));
 138     } else if (emit_kdelta1(as, r, (intptr_t)u64)) {
 139       return;
 140     } else {
 141       if ((u64 & 0xffff)) {
 142         emit_tsi(as, MIPSI_ORI, r, r, u64 & 0xffff);
 143       }
 144       if (((u64 >> 16) & 0xffff)) {
 145         emit_dta(as, MIPSI_DSLL, r, r, 16);
 146         emit_tsi(as, MIPSI_ORI, r, r, (u64 >> 16) & 0xffff);
 147         emit_dta(as, MIPSI_DSLL, r, r, 16);
 148       } else {
 149         emit_dta(as, MIPSI_DSLL32, r, r, 0);
 150       }
 151       emit_loadi(as, r, (int32_t)(u64 >> 32));
 152     }
 153     /* TODO: There are probably more optimization opportunities. */
 154   }
 155 }
 156 
 157 #define emit_loada(as, r, addr)         emit_loadu64(as, (r), u64ptr((addr)))
 158 #else
 159 #define emit_loada(as, r, addr)         emit_loadi(as, (r), i32ptr((addr)))
 160 #endif
 161 
 162 static Reg ra_allock(ASMState *as, intptr_t k, RegSet allow);
 163 static void ra_allockreg(ASMState *as, intptr_t k, Reg r);
 164 
 165 /* Get/set from constant pointer. */
 166 static void emit_lsptr(ASMState *as, MIPSIns mi, Reg r, void *p, RegSet allow)
 167 {
 168   intptr_t jgl = (intptr_t)(J2G(as->J));
 169   intptr_t i = (intptr_t)(p);
 170   Reg base;
 171   if ((uint32_t)(i-jgl) < 65536) {
 172     i = i-jgl-32768;
 173     base = RID_JGL;
 174   } else {
 175     base = ra_allock(as, i-(int16_t)i, allow);
 176   }
 177   emit_tsi(as, mi, r, base, i);
 178 }
 179 
 180 #if LJ_64
 181 static void emit_loadk64(ASMState *as, Reg r, IRIns *ir)
 182 {
 183   const uint64_t *k = &ir_k64(ir)->u64;
 184   Reg r64 = r;
 185   if (rset_test(RSET_FPR, r)) {
 186     r64 = RID_TMP;
 187     emit_tg(as, MIPSI_DMTC1, r64, r);
 188   }
 189   if ((uint32_t)((intptr_t)k-(intptr_t)J2G(as->J)) < 65536)
 190     emit_lsptr(as, MIPSI_LD, r64, (void *)k, 0);
 191   else
 192     emit_loadu64(as, r64, *k);
 193 }
 194 #else
 195 #define emit_loadk64(as, r, ir) \
 196   emit_lsptr(as, MIPSI_LDC1, ((r) & 31), (void *)&ir_knum((ir))->u64, RSET_GPR)
 197 #endif
 198 
 199 /* Get/set global_State fields. */
 200 static void emit_lsglptr(ASMState *as, MIPSIns mi, Reg r, int32_t ofs)
 201 {
 202   emit_tsi(as, mi, r, RID_JGL, ofs-32768);
 203 }
 204 
 205 #define emit_getgl(as, r, field) \
 206   emit_lsglptr(as, MIPSI_AL, (r), (int32_t)offsetof(global_State, field))
 207 #define emit_setgl(as, r, field) \
 208   emit_lsglptr(as, MIPSI_AS, (r), (int32_t)offsetof(global_State, field))
 209 
 210 /* Trace number is determined from per-trace exit stubs. */
 211 #define emit_setvmstate(as, i)          UNUSED(i)
 212 
 213 /* -- Emit control-flow instructions -------------------------------------- */
 214 
 215 /* Label for internal jumps. */
 216 typedef MCode *MCLabel;
 217 
 218 /* Return label pointing to current PC. */
 219 #define emit_label(as)          ((as)->mcp)
 220 
 221 static void emit_branch(ASMState *as, MIPSIns mi, Reg rs, Reg rt, MCode *target)
 222 {
 223   MCode *p = as->mcp;
 224   ptrdiff_t delta = target - p;
 225   lua_assert(((delta + 0x8000) >> 16) == 0);
 226   *--p = mi | MIPSF_S(rs) | MIPSF_T(rt) | ((uint32_t)delta & 0xffffu);
 227   as->mcp = p;
 228 }
 229 
 230 static void emit_jmp(ASMState *as, MCode *target)
 231 {
 232   *--as->mcp = MIPSI_NOP;
 233   emit_branch(as, MIPSI_B, RID_ZERO, RID_ZERO, (target));
 234 }
 235 
 236 static void emit_call(ASMState *as, void *target, int needcfa)
 237 {
 238   MCode *p = as->mcp;
 239   *--p = MIPSI_NOP;
 240   if ((((uintptr_t)target ^ (uintptr_t)p) >> 28) == 0) {
 241     *--p = (((uintptr_t)target & 1) ? MIPSI_JALX : MIPSI_JAL) |
 242            (((uintptr_t)target >>2) & 0x03ffffffu);
 243   } else {  /* Target out of range: need indirect call. */
 244     *--p = MIPSI_JALR | MIPSF_S(RID_CFUNCADDR);
 245     needcfa = 1;
 246   }
 247   as->mcp = p;
 248   if (needcfa) ra_allockreg(as, (intptr_t)target, RID_CFUNCADDR);
 249 }
 250 
 251 /* -- Emit generic operations --------------------------------------------- */
 252 
 253 #define emit_move(as, dst, src) \
 254   emit_ds(as, MIPSI_MOVE, (dst), (src))
 255 
 256 /* Generic move between two regs. */
 257 static void emit_movrr(ASMState *as, IRIns *ir, Reg dst, Reg src)
 258 {
 259   if (dst < RID_MAX_GPR)
 260     emit_move(as, dst, src);
 261   else
 262     emit_fg(as, irt_isnum(ir->t) ? MIPSI_MOV_D : MIPSI_MOV_S, dst, src);
 263 }
 264 
 265 /* Generic load of register with base and (small) offset address. */
 266 static void emit_loadofs(ASMState *as, IRIns *ir, Reg r, Reg base, int32_t ofs)
 267 {
 268   if (r < RID_MAX_GPR)
 269     emit_tsi(as, irt_is64(ir->t) ? MIPSI_LD : MIPSI_LW, r, base, ofs);
 270   else
 271     emit_tsi(as, irt_isnum(ir->t) ? MIPSI_LDC1 : MIPSI_LWC1,
 272              (r & 31), base, ofs);
 273 }
 274 
 275 /* Generic store of register with base and (small) offset address. */
 276 static void emit_storeofs(ASMState *as, IRIns *ir, Reg r, Reg base, int32_t ofs)
 277 {
 278   if (r < RID_MAX_GPR)
 279     emit_tsi(as, irt_is64(ir->t) ? MIPSI_SD : MIPSI_SW, r, base, ofs);
 280   else
 281     emit_tsi(as, irt_isnum(ir->t) ? MIPSI_SDC1 : MIPSI_SWC1,
 282              (r&31), base, ofs);
 283 }
 284 
 285 /* Add offset to pointer. */
 286 static void emit_addptr(ASMState *as, Reg r, int32_t ofs)
 287 {
 288   if (ofs) {
 289     lua_assert(checki16(ofs));
 290     emit_tsi(as, MIPSI_AADDIU, r, r, ofs);
 291   }
 292 }
 293 
 294 #define emit_spsub(as, ofs)     emit_addptr(as, RID_SP, -(ofs))
 295 

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